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SensiML Expands Platform Support for RISC-V Architecture

SensiML

SensiML™ Corporation, a leader in AI software for IoT and a subsidiary of QuickLogic, announced the integration of RISC-V® processor support within its comprehensive AI development tool suite. This addition offers developers unmatched flexibility in building intelligent, resource-constrained edge devices with AI/ML sensor data processing.

The open-source nature of the RISC-V architecture aligns with SensiML’s commitment to transparent, accessible, and customizable solutions for the IoT market. With RISC-V support, developers can now use SensiML’s open-source Piccolo AI™ AutoML tool to create ultra-efficient machine learning models tailored to specific applications using fully open-source hardware and software.

Expanding Hardware Choices for IoT Innovators

RISC-V’s open-source processor design and SensiML’s open-source Piccolo AI toolchain empower developers to design and deploy edge AI solutions with complete control over their product architecture. This combination also unlocks RISC-V’s unique advantages in cost, customization, and scalability. According to a recent market forecast from Omdia, RISC-V processors are poised for significant growth, ramping from just under 1% market share in 2020 to nearly 25% of global processors sold by 2030.

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“By supporting RISC-V, we’re giving our customers more choice and flexibility in implementing AI on IoT edge devices,” said Chris Rogers, CEO of SensiML. “As the only fully open-source AutoML development tool for edge AI, Piccolo AI allows developers to harness the full potential of RISC-V and other architectures to build high-performance, resource-efficient solutions for their specific needs.”

Open-Source Synergy for Edge AI Development

RISC-V’s open architecture and collaborative hardware innovation align well with SensiML’s vision for open collaboration in AI software tools for IoT edge devices. RISC-V provides a cost-effective foundation for processor cores, while SensiML’s Piccolo AI offers a transparent AutoML workflow for developing machine learning models at the edge. Together, they create a powerful, end-to-end platform for unique and optimized IoT products.

With RISC-V support, SensiML takes another step toward democratizing AI for IoT developers. The RISC-V instruction set architecture (ISA) is freely available to anyone seeking to use, implement, or modify it, and supports customization for applications that demand highly optimized SoCs as often required in remote edge sensing devices. This addition offers unprecedented flexibility and transparency, allowing developers to build IoT products on their terms.

Source: PRNewswire