S2C, a recognized leader in FPGA-based prototyping solutions, announces the release of S8-40 Prodigy Logic System, featuring the latest generation FPGA from AMD. Supporting high bandwidth connectivity including PCIe Gen5 and PAM4, S8-40 effectively addresses the verification needs of high bandwidth applications such as storage, AI, and GPU chip designs.
S8-40 Prodigy Logic System offers three high-performance benefits:
- Supports Full-speed PCIe Gen5: S8-40 provides support for PCIe Gen5 x 4 with CXL (EP) and PCIe Gen5 x 8 with CCIX (RC/EP), catering to PCIe-related validation and applications with high bandwidth requirements.
- 56Gbps Data Transfer Capability: Equipped with 104 GTMs at 28 Gbps, 28 GTYPs at 32 Gbps, and 32 GTMs with speeds of up to 56 Gbps, the S8-40 showcases a total bandwidth of 5,600 Gbps.
- Flexible I/O: With high-speed I/O connectors such as Prodigy+, FMC+, PGT+, and MCIO, S8-40 can easily interface with real-world data via application-specific daughter cards, while supporting low-latency inter-FPGA connections.
With the increasing adoption of AI, 5G, IoT, and autonomous driving, the demand for low real-time processing is growing more than ever. These applications often require low-latency and high-bandwidth interfaces such as PCIe Gen5 and high-speed interconnect protocols such as CXL and CCIX. In response to these demands, S2C has developed the S8-40 to meet the verification challenges of the new era and help accelerate the time-to-market.
Also Read: Telit Cinterion Announces Sale of Its Cellular Automotive Module Unit to Kontron
In S8-40, S2C’s 8th generation prototyping family, the high-speed I/O are upgraded to offer a total bandwidth of up to 5,600 Gbps over a wide range of connectors. The connectors are also made more granular to ensure that the S8-40 is capable of handling high-bandwidth protocols such as PCIe Gen5, 600G Ethernet MAC, and 600G Interlaken, while supporting flexible FPGA-to-FPGA interconnectivity, for a more efficient verification deployment.
Compared to the previous generation S7-19P, the S8-40 offers a significant increase in internal memory and DSP engine. With 5.37 times more internal memory and 3.73 times more DSP engine, S8-40 is much more optimal and effective for algorithm-based applications such as AI neural network models, autonomous driving, and high-performance computing (HPC).
Design partitioning is also made easier with S8-40. When combined with Player Pro – CT, S2C‘s partitioning software, S8-40’s high-speed transceivers are the ideal solution for high ratio pin-multiplexing to interconnect design partitions, effectively overcoming the I/O limitation of individual FPGAs. Large-scale chip designs can greatly benefit from such flexible partitioning topologies and improved performance.
SOURCE: PRNewswire